Timenuttery for Beginners, Part 2

How to measure the accuracy of your clock

It started with a radio clock

For no particular reason except to my own entertainment, I built yet another radio clock:

But how accurate is it?

One can do frequency difference measurements using a few components and common lab equipment: Part 1

Having made my way through using the boat anchors and looking at the results, I came to the conclusion: This frequency difference measurement should be done with a purpose-built instrument, so it gets smaller and is able to log its results.

The general idea still is: Use a circuit to multiply the input frequencies by 10, resulting in 100MHz. There's two reasons to settle on 100MHz: 100MHz VCXOs are readily available, and the SCPQ devices I have, work at this frequency.

There's different ways to generate 100MHz from a 10MHz signal, two major ones are: Frequency multipliers and PLL circuits.

Frequency multipliers work by generating harmonic frequencies from the input signal and filtering the desired multiple from that. One has to build a high Q bandpass filter to achieve this.

The other method, PLL, uses a tuneable oscillator and a phase detector in a closed loop. These components (a 100MHz VCXO for the oscillator and a PLL chip) are readily available and easy to use. So I decided to go this way.

Some thoughts:

  • Multiplying the frequencies by 10 achieves a gain of 10 for the difference measurement.
  • I/Q mixing down to DC reveals the phase information, from which the frequency difference information can be derived.
  • Some issues come up with mixing down to DC: One has to deal with resident DC offset voltages (of the IF amplifier and ADC) that may cause problems when calculating the phase / frequency.
  • Mixing down in two steps (one in the analog domain, and the second by digital signal processing) easily deals with the DC offset, as the ADCs will be fed with AC signals.
  • One has to offset one of the reference multipliers by the desired first IF frequency
  • A device to measure frequency difference

    If the diagram doesn't show up, try this link.

    PLL1 multiplies Input 1 by 10. Pretty straightforward using the internal dividers of the ADF4001.

    PLL2 multiplies Input 2 by 10 and adds the offset frequency. This is somewhat more interesting: The ADF4001 doesn't have fine enough divider steps to achieve e.g. a 125Hz offset. I/Q mixing to the rescue, there's another way: Subtract the desired offset frequency from the PLL feedback. Within the MCU, a DDS (direct digital synthesis) generates I and Q signals at the offset frequency, and the I/Q mixing takes care of subtracting this from the VCXO output. As a result, PLL2 outputs its input frequency multiplied by 10 plus the offset frequency (125Hz was chosen here).

    The analog I/Q mixer outputs the difference of "Input frequency 1 * 10" and "Input frequency * 10 + 125".

    After sampling the 125Hz first IF signals, further signal processing is done in the digital domain. The 125Hz band pass filters take care of the DC offset and other unwanted frequencies. The coordinate transformer (basically two I/Q mixers realized in digital signal processing) brings the 125Hz IF down to DC.

    At this point, there's two signals, I and Q, that represent the phase difference information in form of a complex number (or just sine and cosine). An arc tangent function transforms these into a single value, and deriving over time finally delivers the frequency difference.

    For sure, not the most elegant way to achieve a frequency difference measurement. Results are not perfect, as the non-ideal analog I/Q mixers introduce all kinds of spurious, crosstalk and non-linear components to the PLL 2 output frequency and the first IF. More filtering, isolating and buffering might improve this to some extent. Anyway, it works and can log its output data to a database, so I can do shorter and longer term measurements of my radio clock vs. the GPSDO.


    No, proceed to Part 3

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